A8T(Kgoogle,veyron-brain-rev0google,veyron-braingoogle,veyronrockchip,rk3288& 7Google Brainchosenaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000memorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12hw@\@p@ @@OOa sB@ ~ ' 9 K 0 $@29EKcpu@501cpuarm,cortex-a12EKcpu@502cpuarm,cortex-a12EKcpu@503cpuarm,cortex-a12EKamba simple-busSdma-controller@ff250000arm,pl330arm,primecell%@Ze2 apb_pclkEKdma-controller@ff600000arm,pl330arm,primecell`@Ze2 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@Ze2 apb_pclkEEKEreserved-memorySdma-unusable@fe000000oscillator fixed-clockn6xin24mE K timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 2 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 2Drvbiuciuciu-driveciu-sample  @ disableddwmmc@ff0d0000rockchip,rk3288-dw-mshcр 2Eswbiuciuciu-driveciu-sample ! @okay &3I Tbldefault z dwmmc@ff0e0000rockchip,rk3288-dw-mshcр 2Ftxbiuciuciu-driveciu-sample "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 2Guybiuciuciu-driveciu-sample #@okay  ITbldefault zsaradc@ff100000rockchip,saradc $2I[saradcapb_pclkW .saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2ARspiclkapb_pclk:  ?txrx ,ldefaultz disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BSspiclkapb_pclk: ?txrx -ldefaultz disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CTspiclkapb_pclk:?txrx .ldefaultz !"okayI flash@0jedec,spi-nor\i2c@ff140000rockchip,rk3288-i2c >i2c2Mldefaultz#okayn2dtpm@20infineon,slb9645tt i2c@ff150000rockchip,rk3288-i2c ?i2c2Oldefaultz$ disabledi2c@ff160000rockchip,rk3288-i2c @i2c2Pldefaultz%okayn2,i2c@ff170000rockchip,rk3288-i2c Ai2c2Qldefaultz&okayn,EVKVserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 72MUbaudclkapb_pclkldefault z'()okayMlserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 82NVbaudclkapb_pclkldefaultz*okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 92OWbaudclkapb_pclkldefaultz+okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :2PXbaudclkapb_pclkldefaultz, disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;2QYbaudclkapb_pclkldefaultz- disabledthermal-zonesreserve_thermal.cpu_thermald.tripscpu_alert0%p1passiveE/K/cpu_alert1%$1passiveE0K0cpu_crit%_1 criticalcooling-mapsmap0</ Amap1<0 Agpu_thermald.tripsgpu_alert0%p1passiveE1K1gpu_crit%_1 criticalcooling-mapsmap0<1 Atsadc@ff280000rockchip,rk3288-tsadc( %2HZtsadcapb_pclk .tsadc-apblinitdefaultsleepz2P3Z2dzsokayE.K.ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq482fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB .stmmaceth disabledusb@ff500000 generic-ehciP 2usbhost5usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2otghost6 usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2otghost .@@ =7 usb2-phyokayzG7usb@ff5c0000 generic-ehci\ 2usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c2Lldefaultz8okayn2dpmic@1brockchip,rk808xin32kwifibt_32kin&9ldefault z:;<^=> >EcKcregulatorsDCDC_REG1vdd_arm. qF ^qEKregulator-state-memsDCDC_REG2vdd_gpu. 5F^qregulator-state-memB@DCDC_REG3 vcc135_ddrregulator-state-memDCDC_REG4vcc_18.w@Fw@EKregulator-state-memw@LDO_REG3vdd_10.B@FB@regulator-state-memB@LDO_REG7 vdd10_lcd.B@FB@regulator-state-memsSWITCH_REG1 vcc33_lcdEDKDregulator-state-memsSWITCH_REG2 vcc18_hdmii2c@ff660000rockchip,rk3288-i2cf =i2c2Nldefaultz?okayn2 pwm@ff680000rockchip,rk3288-pwmhldefaultz@2^pwm disabledpwm@ff680010rockchip,rk3288-pwmhldefaultzA2^pwmokaypwm@ff680020rockchip,rk3288-pwmh ldefaultzB2^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0ldefaultzC2^pwm disabledbus_intmem@ff700000 mmio-sramp Spsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsEKpower-controller!rockchip,rk3288-power-controllerhG EHKHpd_vio@9 2chgfdehilkjpd_hevc@11 2oppd_video@12 2pd_gpu@13 2syscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv4Hjk$#gׄeрxhрxhEKsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwE4K4edp-phyrockchip,rk3288-dp-phy2h24m  disabledESKSio-domains"rockchip,rk3288-io-voltage-domainokay= +9=I=WDcwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt2p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdifo hclkmclk2T:E?tx 6ldefaultzF4 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5:EE?txrxi2s_hclki2s_clk2RldefaultzG disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 2}aclkhclksclkapb_pclk .crypto-rstokayvop@ff930000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopH def .axiahbdclkIokayportE K endpoint@0JEWKWendpoint@1KETKTendpoint@2LEQKQiommu@ff930300rockchip,iommu  vopb_mmuH okayEIKIvop@ff940000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopH  .axiahbdclkM disabledportE K endpoint@0NEXKXendpoint@1OEUKUendpoint@2PERKRiommu@ff940300rockchip,iommu  vopl_mmuH  disabledEMKMmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 2~d refpclkH 4 disabledportsportendpoint@0QELKLendpoint@1REPKPdp@ff970000rockchip,rk3288-dp@ b2icdppclkSdpo.dp4 disabledportsport@0endpoint@0TEKKKendpoint@1UEOKOhdmi@ff980000rockchip,rk3288-dw-hdmi4 g2hm iahbisfrH okayVportsportendpoint@0WEJKJendpoint@1XENKNinterrupt-controller@ffc01000 arm,gic-400  @ `   EKefuse@ffb40000rockchip,rockchip-efuse 2q pclk_efusecpu_leakage@17phyrockchip,rk3288-usb-phy4okayusb-phy@320  2]phyclkE7K7usb-phy@334 42^phyclkE5K5usb-phy@348 H2_phyclkE6K6pinctrlrockchip,rk3288-pinctrl4SldefaultsleepzYPYgpio0@ff750000rockchip,gpio-banku Q2@)E9K9gpio1@ff780000rockchip,gpio-bankx R2A)gpio2@ff790000rockchip,gpio-banky S2B)EbKbgpio3@ff7a0000rockchip,gpio-bankz T2C)gpio4@ff7b0000rockchip,gpio-bank{ U2D)EfKfgpio5@ff7c0000rockchip,gpio-bank| V2E)gpio6@ff7d0000rockchip,gpio-bank} W2F)gpio7@ff7e0000rockchip,gpio-bank~ X2G)E>K>gpio8@ff7f0000rockchip,gpio-bank Y2H)hdmihdmi-ddc 5ZZvcc50-hdmi-en5ZEhKhpcfg-pull-upCE[K[pcfg-pull-downPE\K\pcfg-pull-none_EZKZpcfg-pull-none-12ma_l E^K^sleepglobal-pwroff5ZEYKYddrio-pwroff5Zddr0-retention5[ddr1-retention5[edpedp-hpd5 \i2c0i2c0-xfer 5ZZE8K8i2c1i2c1-xfer 5ZZE#K#i2c2i2c2-xfer 5 Z ZE?K?i2c3i2c3-xfer 5ZZE$K$i2c4i2c4-xfer 5ZZE%K%i2c5i2c5-xfer 5ZZE&K&i2s0i2s0-bus`5ZZZZZZEGKGsdmmcsdmmc-clk5Zsdmmc-cmd5[sdmmc-cd5[sdmmc-bus15[sdmmc-bus4@5[[[[sdio0sdio0-bus15[sdio0-bus4@5]]]]EKsdio0-cmd5]EKsdio0-clk5]E K sdio0-cd5[sdio0-wp5[sdio0-pwr5[sdio0-bkpwr5[sdio0-int5[wifienable-h5ZEeKebt-enable-l5ZEdKdsdio1sdio1-bus15[sdio1-bus4@5[[[[sdio1-cd5[sdio1-wp5[sdio1-bkpwr5[sdio1-int5[sdio1-cmd5[sdio1-clk5Zsdio1-pwr5 [emmcemmc-clk5]EKemmc-cmd5]EKemmc-pwr5 [emmc-bus15[emmc-bus4@5[[[[emmc-bus85]]]]]]]]EKemmc-reset5 ZEaKaspi0spi0-clk5 [EKspi0-cs05 [EKspi0-tx5[EKspi0-rx5[EKspi0-cs15[spi1spi1-clk5 [EKspi1-cs05 [EKspi1-rx5[EKspi1-tx5[EKspi2spi2-cs15[spi2-clk5[EKspi2-cs05[E"K"spi2-rx5[E!K!spi2-tx5 [E K uart0uart0-xfer 5[ZE'K'uart0-cts5[E(K(uart0-rts5ZE)K)uart1uart1-xfer 5[ ZE*K*uart1-cts5 [uart1-rts5 Zuart2uart2-xfer 5[ZE+K+uart3uart3-xfer 5[ZE,K,uart3-cts5 [uart3-rts5 Zuart4uart4-xfer 5 [ ZE-K-uart4-cts5[uart4-rts5Ztsadcotp-gpio5 ZE2K2otp-out5 ZE3K3pwm0pwm0-pin5ZE@K@pwm1pwm1-pin5ZEAKApwm2pwm2-pin5ZEBKBpwm3pwm3-pin5ZECKCgmacrgmii-pins5ZZZZ^^^^ZZZ ^^ZZrmii-pins5ZZZZZZZZZZspdifspdif-tx5 ZEFKFpcfg-pull-none-drv-8ma_lE]K]pcfg-pull-up-drv-8maClpcfg-output-high{pcfg-output-lowbuttonspwr-key-l5[E_K_pmicpmic-int-l5[E:K:dvs-15 \E;K;dvs-25\E<K<rebootap-warm-reset-h5 ZE`K`recovery-switchrec-mode-l5 [tpmtpm-int-h5Zwrite-protectfw-wp-ap5Zusb-hostusb2-pwr-en5 ZEiKigpio-keys gpio-keysldefaultz_powerPower 9tdgpio-restart gpio-restart 9 ldefaultz`emmc-pwrseqmmc-pwrseq-emmczaldefault b EKsdio-pwrseqmmc-pwrseq-simple2c ext_clockldefaultzde fE K vcc-5vregulator-fixedvcc_5v.LK@FLK@EgKgvcc33-sysregulator-fixed vcc33_sys.2ZF2ZgEKvcc50-hdmiregulator-fixed vcc50_hdmig >ldefaultzhvcc33_ioregulator-fixed vcc33_ioE=K=vcc5-host2-regulatorregulator-fixed 9 ldefaultzi vcc5_host2 #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablenum-slotspinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplycap-mmc-highspeedrockchip,default-sample-phasedisable-wpmmc-hs200-1_8v#io-channel-cellsreset-namesdmasdma-namesrx-sample-delay-nsspi-max-frequencyi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedreg-shiftreg-io-widthassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphysphy-namesneeds-reset-on-resumedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmaassigned-clock-parentsrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplydvs-gpiosregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltregulator-suspend-mem-disabled#pwm-cells#power-domain-cells#reset-cells#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowlabellinux,codedebounce-intervalpriorityreset-gpiosvin-supplyenable-active-highgpio