8(9p,firefly,firefly-rk3288-betarockchip,rk3288&7Firefly-RK3288 Betachosenaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000memorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12`@p@ @OOa sB@ ~ ' 9  K 0 $@29EKcpu@501cpuarm,cortex-a12EKcpu@502cpuarm,cortex-a12EKcpu@503cpuarm,cortex-a12EKamba simple-busSdma-controller@ff250000arm,pl330arm,primecell%@Ze2 apb_pclkEKdma-controller@ff600000arm,pl330arm,primecell`@Ze2 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@Ze2 apb_pclkEUKUreserved-memorySdma-unusable@fe000000oscillator fixed-clockn6xin24mE K timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 2 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 2Drvbiuciuciu-driveciu-sample  @okay '8JU_defaultm wdwmmc@ff0d0000rockchip,rk3288-dw-mshcр 2Eswbiuciuciu-driveciu-sample ! @okay JU_default mwdwmmc@ff0e0000rockchip,rk3288-dw-mshcр 2Ftxbiuciuciu-driveciu-sample "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 2Guybiuciuciu-driveciu-sample #@okay JU_defaultmwsaradc@ff100000rockchip,saradc $2I[saradcapb_pclkW saradc-apbokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2ARspiclkapb_pclk  txrx ,_defaultm !"okayspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BSspiclkapb_pclk txrx -_defaultm#$%& disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CTspiclkapb_pclktxrx ._defaultm'()* disabledi2c@ff140000rockchip,rk3288-i2c >i2c2M_defaultm+okayi2c@ff150000rockchip,rk3288-i2c ?i2c2O_defaultm, disabledi2c@ff160000rockchip,rk3288-i2c @i2c2P_defaultm-okayi2c@ff170000rockchip,rk3288-i2c Ai2c2Q_defaultm.okayEfKfserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 72MUbaudclkapb_pclk_default m/01okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 82NVbaudclkapb_pclk_defaultm2okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 92OWbaudclkapb_pclk_defaultm3okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :2PXbaudclkapb_pclk_defaultm4okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;2QYbaudclkapb_pclk_defaultm5 disabledthermal-zonesreserve_thermal6cpu_thermald6tripscpu_alert0"p.passiveE7K7cpu_alert1"$.passiveE8K8cpu_crit"_. criticalcooling-mapsmap097 >map198 >gpu_thermald6tripsgpu_alert0"p.passiveE9K9gpu_crit"_. criticalcooling-mapsmap099 >tsadc@ff280000rockchip,rk3288-tsadc( %2HZtsadcapb_pclk tsadc-apb_initdefaultsleepm:M;W:awsokayE6K6ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq<82fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmacethok=input_defaultm>?@ABrgmii% ;'B@ PC`0iusb@ff500000 generic-ehciP 2usbhostrDwusb disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2otghostrE wusb2-phyokay_defaultmFusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2otgotg@@ rG wusb2-phyokayusb@ff5c0000 generic-ehci\ 2usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c2L_defaultmHokaysyr827@40silergy,syr827@vdd_cpu Pp3E,a@vEKsyr828@41silergy,syr828Avdd_gpu Ppvhym8563@51haoyu,hym8563Qxin32k&I_defaultmJact8846@5aactive-semi,act8846Z_defaultmKLMregulatorsREG1vcc_ddrOOREG2vcc_io2Z2ZEKREG3vdd_logREG4vcc_20EMKMREG5 vccio_sd2Z2ZEKREG6 vdd10_lcdB@B@REG7vcca_18w@w@REG8vcca_332Z2ZESKSREG9vcc_lan2Z2ZEBKBREG10vdd_10B@B@REG11vcc_18w@w@EKREG12 vcc18_lcdw@w@i2c@ff660000rockchip,rk3288-i2cf =i2c2N_defaultmNokaypwm@ff680000rockchip,rk3288-pwmh_defaultmO2^pwmokaypwm@ff680010rockchip,rk3288-pwmh_defaultmP2^pwm disabledpwm@ff680020rockchip,rk3288-pwmh _defaultmQ2^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0_defaultmR2^pwm disabledbus_intmem@ff700000 mmio-sramp Spsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsEKpower-controller!rockchip,rk3288-power-controllerh EXKXpd_vio@9 2chgfdehilkjpd_hevc@11 2oppd_video@12 2pd_gpu@13 2syscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv<Hjk$#gׄeрxhрxhEKsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwE<K<edp-phyrockchip,rk3288-dp-phy2h24m* disabledEcKcio-domains"rockchip,rk3288-io-voltage-domainokay5SBLTWeBswatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt2p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk2TUtx 6_defaultmV< disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5UUtxrxi2s_hclki2s_clk2R_defaultmW disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 2}aclkhclksclkapb_pclk crypto-rstokayvop@ff930000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopX def axiahbdclk YokayportE K endpoint@0ZEgKgendpoint@1[EdKdendpoint@2\EaKaiommu@ff930300rockchip,iommu  vopb_mmuX "okayEYKYvop@ff940000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopX  axiahbdclk ]okayportE K endpoint@0^EhKhendpoint@1_EeKeendpoint@2`EbKbiommu@ff940300rockchip,iommu  vopl_mmuX "okayE]K]mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 2~d refpclkX < disabledportsportendpoint@0aE\K\endpoint@1bE`K`dp@ff970000rockchip,rk3288-dp@ b2icdppclkrcwdpodp< disabledportsport@0endpoint@0dE[K[endpoint@1eE_K_hdmi@ff980000rockchip,rk3288-dw-hdmi< g2hm iahbisfrX okay/fportsportendpoint@0gEZKZendpoint@1hE^K^interrupt-controller@ffc01000 arm,gic-400;P  @ `   EKefuse@ffb40000rockchip,rockchip-efuse 2q pclk_efusecpu_leakage@17phyrockchip,rk3288-usb-phy<okayusb-phy@320* 2]phyclkEGKGusb-phy@334*42^phyclkEDKDusb-phy@348*H2_phyclkEEKEpinctrlrockchip,rk3288-pinctrl<Sgpio0@ff750000rockchip,gpio-banku Q2@aq;PErKrgpio1@ff780000rockchip,gpio-bankx R2Aaq;Pgpio2@ff790000rockchip,gpio-banky S2Baq;Pgpio3@ff7a0000rockchip,gpio-bankz T2Caq;Pgpio4@ff7b0000rockchip,gpio-bank{ U2Daq;PECKCgpio5@ff7c0000rockchip,gpio-bank| V2Eaq;Pgpio6@ff7d0000rockchip,gpio-bank} W2Faq;Pgpio7@ff7e0000rockchip,gpio-bank~ X2Gaq;PEIKIgpio8@ff7f0000rockchip,gpio-bank Y2Haq;PEtKthdmihdmi-ddc }iipcfg-pull-upEjKjpcfg-pull-downEkKkpcfg-pull-noneEiKipcfg-pull-none-12ma ElKlsleepglobal-pwroff}iddrio-pwroff}iddr0-retention}jddr1-retention}jedpedp-hpd} ki2c0i2c0-xfer }iiEHKHi2c1i2c1-xfer }iiE+K+i2c2i2c2-xfer } i iENKNi2c3i2c3-xfer }iiE,K,i2c4i2c4-xfer }iiE-K-i2c5i2c5-xfer }iiE.K.i2s0i2s0-bus`}iiiiiiEWKWsdmmcsdmmc-clk}lE K sdmmc-cmd}mE K sdmmc-cd}jEKsdmmc-bus1}jsdmmc-bus4@}mmmmEKsdmmc-pwr} iEwKwsdio0sdio0-bus1}jsdio0-bus4@}jjjjEKsdio0-cmd}jEKsdio0-clk}iEKsdio0-cd}jsdio0-wp}jsdio0-pwr}jsdio0-bkpwr}jsdio0-int}jsdio1sdio1-bus1}jsdio1-bus4@}jjjjsdio1-cd}jsdio1-wp}jsdio1-bkpwr}jsdio1-int}jsdio1-cmd}jsdio1-clk}isdio1-pwr} jemmcemmc-clk}iEKemmc-cmd}jEKemmc-pwr} jEKemmc-bus1}jemmc-bus4@}jjjjemmc-bus8}jjjjjjjjEKspi0spi0-clk} jEKspi0-cs0} jEKspi0-tx}jE K spi0-rx}jE!K!spi0-cs1}jE"K"spi1spi1-clk} jE#K#spi1-cs0} jE&K&spi1-rx}jE%K%spi1-tx}jE$K$spi2spi2-cs1}jspi2-clk}jE'K'spi2-cs0}jE*K*spi2-rx}jE)K)spi2-tx} jE(K(uart0uart0-xfer }jiE/K/uart0-cts}jE0K0uart0-rts}iE1K1uart1uart1-xfer }j iE2K2uart1-cts} juart1-rts} iuart2uart2-xfer }jiE3K3uart3uart3-xfer }jiE4K4uart3-cts} juart3-rts} iuart4uart4-xfer } j iE5K5uart4-cts}juart4-rts}itsadcotp-gpio} iE:K:otp-out} iE;K;pwm0pwm0-pin}iEOKOpwm1pwm1-pin}iEPKPpwm2pwm2-pin}iEQKQpwm3pwm3-pin}iERKRgmacrgmii-pins}iiiilllliii lliiE>K>rmii-pins}iiiiiiiiiiphy-int} jEAKAphy-pmeb}jE@K@phy-rst}nE?K?spdifspdif-tx} iEVKVpcfg-output-highEnKnpcfg-output-lowEoKopcfg-pull-up-drv-12ma EmKmact8846pwr-hold}nELKLpmic-vsel}oEKKKdvpdvp-pwr} iE{K{hym8563rtc-int}jEJKJkeyspwr-key}jEsKsledspower-led}iEvKvwork-led}iEuKuusb_hosthost-vbus-drv}iExKxusbhub-rst}nEFKFusb_otgotg-vbus-drv} iEzKzirir-int}jEqKqdovdd-1v8-regulatorregulator-fixed dovdd_1v8w@w@vpETKTexternal-gmac-clock fixed-clocksY@ ext_gmacE=K=ir-receivergpio-ir-receiver_defaultmq Igpio-keys gpio-keyspower r GPIO Powert_defaultmsleds gpio-ledswork tfirefly:blue:user rc-feedback_defaultmupower tfirefly:green:power default-on_defaultmvvsys-regulatorregulator-fixedvcc_sysLK@LK@3EKsdmmc-regulatorregulator-fixed [I _defaultmwvcc_sd2Z2ZvEKflash-regulatorregulator-fixed vcc_flashw@w@vEKusb-regulatorregulator-fixedvcc_5vLK@LK@3vEyKyusb-host-regulatorregulator-fixed& [r_defaultmx vcc_host_5vLK@LK@vyusb-otg-regulatorregulator-fixed& [r _defaultmz vcc_otg_5vLK@LK@vyvcc28-dvp-regulatorregulator-fixed& [r _defaultm{ vcc28_dvp**vEpKp #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotspinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsreset-namesvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmafcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplysystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#power-domain-cells#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowgpioswakeup-sourcelabellinux,codelinux,default-triggerstartup-delay-usenable-active-high