V 8Qt(Q<CompuLab SBC-iMX71!compulab,sbc-imx7compulab,cl-som-imx7fsl,imx7dchosenaliases%,/soc/aips-bus@30000000/gpio@30200000%2/soc/aips-bus@30000000/gpio@30210000%8/soc/aips-bus@30000000/gpio@30220000%>/soc/aips-bus@30000000/gpio@30230000%D/soc/aips-bus@30000000/gpio@30240000%J/soc/aips-bus@30000000/gpio@30250000%P/soc/aips-bus@30000000/gpio@30260000$V/soc/aips-bus@30800000/i2c@30a20000$[/soc/aips-bus@30800000/i2c@30a30000$`/soc/aips-bus@30800000/i2c@30a40000$e/soc/aips-bus@30800000/i2c@30a50000&j/soc/aips-bus@30800000/usdhc@30b40000&o/soc/aips-bus@30800000/usdhc@30b50000&t/soc/aips-bus@30800000/usdhc@30b60000'y/soc/aips-bus@30800000/serial@30860000'/soc/aips-bus@30800000/serial@30890000'/soc/aips-bus@30800000/serial@30880000'/soc/aips-bus@30800000/serial@30a60000'/soc/aips-bus@30800000/serial@30a70000'/soc/aips-bus@30800000/serial@30a80000'/soc/aips-bus@30800000/serial@30a90000&/soc/aips-bus@30800000/ecspi@30820000&/soc/aips-bus@30800000/ecspi@30830000&/soc/aips-bus@30800000/ecspi@30840000&/soc/aips-bus@30400000/ecspi@30630000memorymemoryрcpuscpu@0!arm,cortex-a7cpu2g8 l cpu@1!arm,cortex-a7cpu& &interrupt-controller@31001000!arm,cortex-a7-gic% 11 1@ 1`  clock-cki !fixed-clock:GWckil clock-osc !fixed-clock:Gn6Wosc timer!arm,armv7-timer0j   uetr@30086000 !arm,coresight-tmcarm,primecell0`J apb_pclkportendpoint tpiu@30087000!!arm,coresight-tpiuarm,primecell0pJ apb_pclkportendpoint replicator!arm,coresight-replicatorportsport@0endpointport@1endpoint port@2endpoint  etf@30084000 !arm,coresight-tmcarm,primecell0@J apb_pclkportsport@0endpoint  port@1endpoint  funnel@30083000#!arm,coresight-funnelarm,primecell00J apb_pclkportsport@0endpoint   port@1endpointport@2endpoint  funnel@30041000#!arm,coresight-funnelarm,primecell0J apb_pclkportsport@0endpoint  port@2endpoint   port@1endpoint' 'etm@3007c000"!arm,coresight-etm3xarm,primecell0J apb_pclkportendpoint  soc !simple-busuaips-bus@30000000!fsl,aips-bussimple-bus0@gpio@30200000!fsl,imx7d-gpiofsl,imx35-gpio0 j@A%( (gpio@30210000!fsl,imx7d-gpiofsl,imx35-gpio0!jBC%gpio@30220000!fsl,imx7d-gpiofsl,imx35-gpio0"jDE%gpio@30230000!fsl,imx7d-gpiofsl,imx35-gpio0#jFG%gpio@30240000!fsl,imx7d-gpiofsl,imx35-gpio0$jHI% gpio@30250000!fsl,imx7d-gpiofsl,imx35-gpio0%jJK%gpio@30260000!fsl,imx7d-gpiofsl,imx35-gpio0&jLM%wdog@30280000!fsl,imx7d-wdtfsl,imx21-wdt0( jNBwdog@30290000!fsl,imx7d-wdtfsl,imx21-wdt0) jO disabledwdog@302a0000!fsl,imx7d-wdtfsl,imx21-wdt0* j  disabledwdog@302b0000!fsl,imx7d-wdtfsl,imx21-wdt0+ jm disablediomuxc-lpsr@302c0000!fsl,imx7d-iomuxc-lpsr0,gpt@302d0000!fsl,imx7d-gptfsl,imx6sx-gpt0- j7.ipgpergpt@302e0000!fsl,imx7d-gptfsl,imx6sx-gpt0. j62ipgper disabledgpt@302f0000!fsl,imx7d-gptfsl,imx6sx-gpt0/ j56ipgper disabledgpt@30300000!fsl,imx7d-gptfsl,imx6sx-gpt00 j4:ipgper disablediomuxc@30330000!fsl,imx7d-iomuxc03 enet1grpPh XDHLPT@,048<  enet2grp  xtx|$ $i2c2grp0T@P@ uart1grp0,y(y usbotg1grpD usdhc3grpDY@HYLYPYTYXY\Y`YdYh usdhc1grpY YYYYYY iomuxc-gpr@30340000!fsl,imx7d-iomuxc-gprsyscon04ocotp-ctrl@30350000!syscon05 disabledanatop@303600004!fsl,imx7d-anatopfsl,imx6q-anatopsysconsimple-bus06j13regulator-vdd1p0d!fsl,anatop-regulatorvdd1p0d 5O1CXm 5Osnvs@30370000#!fsl,sec-v4.0-monsysconsimple-mfd07 snvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lp<4jsnvs-poweroff!syscon-poweroff<8`snvs-powerkey!fsl,sec-v4.0-pwrkey jtccm@30380000!fsl,imx7d-ccm08jUV: ckilosc src@30390000#!fsl,imx7d-srcfsl,imx51-srcsyscon09 jYaips-bus@30400000!fsl,aips-bussimple-bus0@@adc@30610000!fsl,imx7d-adc0a jbadc disabledadc@30620000!fsl,imx7d-adc0b jcadc disabledecspi@30630000 !fsl,imx7d-ecspifsl,imx51-ecspi0c j"  ipgper disabledpwm@30660000!fsl,imx7d-pwmfsl,imx27-pwm0f jQipgper disabledpwm@30670000!fsl,imx7d-pwmfsl,imx27-pwm0g jRipgper disabledpwm@30680000!fsl,imx7d-pwmfsl,imx27-pwm0h jSipgper disabledpwm@30690000!fsl,imx7d-pwmfsl,imx27-pwm0i jTipgper disabledlcdif@30730000 !fsl,imx7d-lcdiffsl,imx28-lcdif0s j~pixaxidisp_axi disabledaips-bus@30800000!fsl,aips-bussimple-bus0@ecspi@30820000 !fsl,imx7d-ecspifsl,imx51-ecspi0 jipgper disabledecspi@30830000 !fsl,imx7d-ecspifsl,imx51-ecspi0 j ipgper disabledecspi@30840000 !fsl,imx7d-ecspifsl,imx51-ecspi0 j!ipgper disabledserial@30860000!fsl,imx7d-uartfsl,imx6q-uart0 jipgperokaydefault  serial@30890000!fsl,imx7d-uartfsl,imx6q-uart0 jipgper disabledserial@30880000!fsl,imx7d-uartfsl,imx6q-uart0 jipgper disabledcan@30a00000$!fsl,imx7d-flexcanfsl,imx6q-flexcan0 jnipgper disabledcan@30a10000$!fsl,imx7d-flexcanfsl,imx6q-flexcan0 joipgper disabledi2c@30a20000!fsl,imx7d-i2cfsl,imx21-i2c0 j# disabledi2c@30a30000!fsl,imx7d-i2cfsl,imx21-i2c0 j$okaydefaultpmic@8!fsl,pfuze3000regulatorssw1a `7I]j sw1b `7I]jsw2`:7Isw3 -P7IswbstLK@N0vsnvsB@-7Ivrefddr7Ivldo1w@2ZIvldo2 5vccsd+|2ZIv33+|2ZIvldo3w@2ZIvldo4w@2ZIpca9555@20 !nxp,pca9555 eeprom@50 !atmel,24c08Pri2c@30a40000!fsl,imx7d-i2cfsl,imx21-i2c0 j% disabledi2c@30a50000!fsl,imx7d-i2cfsl,imx21-i2c0 j& disabledserial@30a60000!fsl,imx7d-uartfsl,imx6q-uart0 jipgper disabledserial@30a70000!fsl,imx7d-uartfsl,imx6q-uart0 jipgper disabledserial@30a80000!fsl,imx7d-uartfsl,imx6q-uart0 jipgper disabledserial@30a90000!fsl,imx7d-uartfsl,imx6q-uart0 j~ipgper disabledusb@30b10000!fsl,imx7d-usbfsl,imx27-usb0 j+{okaydefaultusb@30b30000!fsl,imx7d-usbfsl,imx27-usb0 j({hsichost disabledusbmisc@30b10200$!fsl,imx7d-usbmiscfsl,imx6q-usbmisc0 usbmisc@30b30200$!fsl,imx7d-usbmiscfsl,imx6q-usbmisc0 usbphynop1!usb-nop-xceiv main_clk usbphynop3!usb-nop-xceivn main_clk usdhc@30b40000!!fsl,imx7d-usdhcfsl,imx6sl-usdhc0 j ipgahbperokaydefault  usdhc@30b50000!!fsl,imx7d-usdhcfsl,imx6sl-usdhc0 j ipgahbper disabledusdhc@30b60000!!fsl,imx7d-usdhcfsl,imx6sl-usdhc0 j ipgahbperokaydefaultׄethernet@30be0000!fsl,imx7d-fecfsl,imx6sx-fec0$jvwx(RR*"ipgahbptpenet_clk_refenet_out 2okaydefault  +DrgmiiM!Xmdioethernet-phy@0! !ethernet-phy@1% %usb@30b20000!fsl,imx7d-usbfsl,imx27-usb0 j*{"# disabledusbmisc@30b20200$!fsl,imx7d-usbmiscfsl,imx6q-usbmisc0# #usbphynop2!usb-nop-xceiv main_clk" "ethernet@30bf0000!fsl,imx7d-fecfsl,imx6sx-fec0$jdef(RR*"ipgahbptpenet_clk_refenet_out 2okaydefault$ +DrgmiiM%Xetm@3007d000"!arm,coresight-etm3xarm,primecell0i V&J apb_pclkportendpoint' regulator-vbus!regulator-fixedusb_otg1_vbusLK@LK@ (  #address-cells#size-cellsmodelcompatiblegpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2i2c3mmc0mmc1mmc2serial0serial1serial2serial3serial4serial5serial6spi0spi1spi2spi3device_typeregoperating-pointsclock-latencyclocksarm-supplylinux,phandle#interrupt-cellsinterrupt-controller#clock-cellsclock-frequencyclock-output-namesinterruptsinterrupt-parentclock-namesslave-moderemote-endpointcpurangesgpio-controller#gpio-cellsstatusfsl,input-selfsl,pinsregulator-nameregulator-min-microvoltregulator-max-microvoltanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitregmapmasklinux,keycodewakeup-source#reset-cells#pwm-cellspinctrl-namespinctrl-0assigned-clocksassigned-clock-parentsregulator-boot-onregulator-always-onregulator-ramp-delaypagesizefsl,usbphyfsl,usbmiscphy-clkgate-delay-usvbus-supplyphy_typedr_mode#index-cellsbus-widthcd-gpioswp-gpiosassigned-clock-ratesfsl,tuning-stepnon-removablefsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handlefsl,magic-packetarm,primecell-periphidgpioenable-active-high