8\( =$nvidia,beavernvidia,tegra30 +'7NVIDIA Tegra30 Beaver evaluation boardemc-dvfs-opp-tableoperating-points-v2=opp@12750000,950 E~~pSŒZopp@12750000,1000 EB@B@pSŒZopp@12750000,1250 EpSŒZopp@25500000,950 E~~pS`Zopp@25500000,1000 EB@B@pS`Zopp@25500000,1250 EpS`Zopp@27000000,950 E~~pSZopp@27000000,1000 EB@B@pSZopp@27000000,1250 EpSZopp@51000000,950 E~~pS 2Zopp@51000000,1000 EB@B@pS 2Zopp@51000000,1250 EpS 2Zopp@54000000,950 E~~pS7Zopp@54000000,1000 EB@B@pS7Zopp@54000000,1250 EpS7Zopp@102000000,950 E~~pSeZopp@102000000,1000 EB@B@pSeZopp@102000000,1250 EpSeZopp@108000000,1000 EB@B@pSoZopp@108000000,1250 EpSoZopp@204000000,1000 EB@B@pS (Zkopp@204000000,1250 EpS (Zkopp@333500000,1000 EB@B@pS`Zopp@333500000,1200 EOOpS`Zopp@333500000,1250 EpS`Zopp@375000000,1000 EB@B@pSZ Zopp@375000000,1200 EOOpSZ Zopp@375000000,1250 EpSZ Zopp@400000000,1000 EB@B@pSׄZopp@400000000,1200 EOOpSׄZopp@400000000,1250 EpSׄZopp@416000000,1200 EOOpS˨Zopp@416000000,1250 EpS˨Zopp@450000000,1200 EOOpStZopp@450000000,1250 EpStZopp@533000000,1200 EOOpS@Zopp@533000000,1250 EpS@Zopp@625000000,1200 EOOpS%@@Zopp@625000000,1250 EpS%@@Zopp@667000000,1200 EOOpS'Zopp@750000000,1300 E  pS,Zopp@800000000,1300 E  pS/Zopp@900000000,1350 EpppS5Zemc-bandwidth-opp-tableoperating-points-v2= opp@12750000SŒZwpopp@25500000S`Zwopp@27000000SZwKopp@51000000S 2Zw9opp@54000000S7Zwopp@102000000SeZw sopp@108000000SoZw /opp@204000000S (Zwkopp@333500000S`Zw(opp@375000000SZ Zw-opp@400000000SׄZw0opp@416000000S˨Zw2opp@450000000StZw6opp@533000000S@ZwA@opp@625000000S%@@ZwLK@opp@667000000S'ZwQkopp@750000000S,Zw[opp@800000000S/Zwaopp@900000000S5Zwmmemory@80000000memorypcie@3000nvidia,tegra30-pciepci08 padsaficsbc intrmsi b+@@ B(( FHpexafipll_ecmlFHJpexafipcie_x#okay*+;<L`qpci@1,0pci#okay+pci@2,0pci #disabled+pci@3,0pci@#okay+sram@40000000 mmio-sram@+ @sram@400=host1x@50000000nvidia,tegra30-host1xP@ACsyncpthost1xhost1xhost1x + TTmpe@54040000nvidia,tegra30-mpeT D<<mpevi@54080000nvidia,tegra30-viT Eviepp@540c0000nvidia,tegra30-eppT  Feppisp@54100000nvidia,tegra30-ispT Gispgr2d@54140000nvidia,tegra30-gr2dT H2dgr3d@54180000nvidia,tegra30-gr3dTb3d3d2b3d3d2  dc@54200000nvidia,tegra30-dcT  I dcparentdc<#winawinbwinb-vfilterwinccursorrgb #disableddc@54240000nvidia,tegra30-dcT$ J dcparentdc<#winawinbwinb-vfilterwinccursorrgb #disabledhdmi@54280000nvidia,tegra30-hdmiT( K3 hdmiparent3hdmi#okay U   o tvo@542c0000nvidia,tegra30-tvoT, L #disableddsi@54300000nvidia,tegra30-dsiT00 dsiparent0dsi #disableddsi@54400000nvidia,tegra30-dsiT@R dsiparentTdsi #disabledtimer@50040600arm,cortex-a9-twd-timerP    interrupt-controller@50041000arm,cortex-a9-gicPP- =cache-controller@50043000arm,pl310-cacheP0 B Scqinterrupt-controller@60004000nvidia,tegra30-ictlr(`@`AP`BP`CP`DP- =timer@60005000*nvidia,tegra30-timernvidia,tegra20-timer`PH)*yzclock@60006000nvidia,tegra30-car``}=flow-controller@60007000nvidia,tegra30-flowctrl`pdma@6000a000,nvidia,tegra30-apbdmanvidia,tegra20-apbdma`hijklmnopqrstuvw""dma=ahb@6000c000nvidia,tegra30-ahb`Pactmon@6000c800nvidia,tegra30-actmon` -w9 actmonemcwactmon  ' cpu-read=#gpio@6000d000nvidia,tegra30-gpio`` !"#7WY}-= vde@6001a000&nvidia,tegra30-vdenvidia,tegra20-vdeH`````````*sxebsevmbeppemcetfeppbvdmaframeid$   sync-tokenbsevsxe=vdemc=apbmisc@70000800.nvidia,tegra30-apbmiscnvidia,tegra20-apbmiscpdppinmux@70000868nvidia,tegra30-pinmuxphp0defaultpinmux=clk_32k_out_pa0clk_32k_out_pa0 blink&6uart3_cts_n_pa1uart3_cts_n_pa1 uartc&6dap2_fs_pa2 dap2_fs_pa2 i2s1&6dap2_sclk_pa3dap2_sclk_pa3 i2s1&6dap2_din_pa4 dap2_din_pa4 i2s1&6dap2_dout_pa5dap2_dout_pa5 i2s1&6sdmmc3_clk_pa6sdmmc3_clk_pa6 sdmmc3&6sdmmc3_cmd_pa7sdmmc3_cmd_pa7 sdmmc3&6gmi_a17_pb0 gmi_a17_pb0 spi4&6gmi_a18_pb1 gmi_a18_pb1 spi4&6lcd_pwr0_pb2 lcd_pwr0_pb2  displaya&6lcd_pclk_pb3 lcd_pclk_pb3  displaya&6sdmmc3_dat3_pb4sdmmc3_dat3_pb4 sdmmc3&6sdmmc3_dat2_pb5sdmmc3_dat2_pb5 sdmmc3&6sdmmc3_dat1_pb6sdmmc3_dat1_pb6 sdmmc3&6sdmmc3_dat0_pb7sdmmc3_dat0_pb7 sdmmc3&6uart3_rts_n_pc0uart3_rts_n_pc0 uartc&6lcd_pwr1_pc1 lcd_pwr1_pc1  displaya&6uart2_txd_pc2uart2_txd_pc2 uartb&6uart2_rxd_pc3uart2_rxd_pc3 uartb&6gen1_i2c_scl_pc4gen1_i2c_scl_pc4 i2c1&6Jgen1_i2c_sda_pc5gen1_i2c_sda_pc5 i2c1&6Jlcd_pwr2_pc6 lcd_pwr2_pc6  displaya&6gmi_wp_n_pc7 gmi_wp_n_pc7 gmi&6sdmmc3_dat5_pd0sdmmc3_dat5_pd0 sdmmc3&6sdmmc3_dat4_pd1sdmmc3_dat4_pd1 sdmmc3&6lcd_dc1_pd2 lcd_dc1_pd2  displaya&6sdmmc3_dat6_pd3sdmmc3_dat6_pd3 spdif&6sdmmc3_dat7_pd4sdmmc3_dat7_pd4 spdif&6vi_d1_pd5 vi_d1_pd5 sdmmc2&6vi_vsync_pd6 vi_vsync_pd6 ddr&6vi_hsync_pd7 vi_hsync_pd7 ddr&6lcd_d0_pe0 lcd_d0_pe0  displaya&6lcd_d1_pe1 lcd_d1_pe1  displaya&6lcd_d2_pe2 lcd_d2_pe2  displaya&6lcd_d3_pe3 lcd_d3_pe3  displaya&6lcd_d4_pe4 lcd_d4_pe4  displaya&6lcd_d5_pe5 lcd_d5_pe5  displaya&6lcd_d6_pe6 lcd_d6_pe6  displaya&6lcd_d7_pe7 lcd_d7_pe7  displaya&6lcd_d8_pf0 lcd_d8_pf0  displaya&6lcd_d9_pf1 lcd_d9_pf1  displaya&6lcd_d10_pf2 lcd_d10_pf2  displaya&6lcd_d11_pf3 lcd_d11_pf3  displaya&6lcd_d12_pf4 lcd_d12_pf4  displaya&6lcd_d13_pf5 lcd_d13_pf5  displaya&6lcd_d14_pf6 lcd_d14_pf6  displaya&6lcd_d15_pf7 lcd_d15_pf7  displaya&6gmi_ad0_pg0 gmi_ad0_pg0 nand&6gmi_ad1_pg1 gmi_ad1_pg1 nand&6gmi_ad2_pg2 gmi_ad2_pg2 nand&6gmi_ad3_pg3 gmi_ad3_pg3 nand&6gmi_ad4_pg4 gmi_ad4_pg4 nand&6gmi_ad5_pg5 gmi_ad5_pg5 nand&6gmi_ad6_pg6 gmi_ad6_pg6 nand&6gmi_ad7_pg7 gmi_ad7_pg7 nand&6gmi_ad8_ph0 gmi_ad8_ph0 pwm0&6gmi_ad9_ph1 gmi_ad9_ph1 pwm1&6gmi_ad10_ph2 gmi_ad10_ph2 nand&6gmi_ad11_ph3 gmi_ad11_ph3 nand&6gmi_ad12_ph4 gmi_ad12_ph4 nand&6gmi_ad13_ph5 gmi_ad13_ph5 nand&6gmi_ad14_ph6 gmi_ad14_ph6 nand&6gmi_wr_n_pi0 gmi_wr_n_pi0 nand&6gmi_oe_n_pi1 gmi_oe_n_pi1 nand&6gmi_dqs_pi2 gmi_dqs_pi2 nand&6gmi_iordy_pi5gmi_iordy_pi5 rsvd1&6gmi_cs7_n_pi6gmi_cs7_n_pi6 nand&6gmi_wait_pi7 gmi_wait_pi7 nand&6lcd_de_pj1 lcd_de_pj1  displaya&6lcd_hsync_pj3lcd_hsync_pj3  displaya&6lcd_vsync_pj4lcd_vsync_pj4  displaya&6uart2_cts_n_pj5uart2_cts_n_pj5 uartb&6uart2_rts_n_pj6uart2_rts_n_pj6 uartb&6gmi_a16_pj7 gmi_a16_pj7 spi4&6gmi_adv_n_pk0gmi_adv_n_pk0 nand&6gmi_clk_pk1 gmi_clk_pk1 nand&6gmi_cs2_n_pk3gmi_cs2_n_pk3 rsvd1&6gmi_cs3_n_pk4gmi_cs3_n_pk4 nand&6spdif_out_pk5spdif_out_pk5 spdif&6spdif_in_pk6 spdif_in_pk6 spdif&6gmi_a19_pk7 gmi_a19_pk7 spi4&6vi_d2_pl0 vi_d2_pl0 sdmmc2&6vi_d3_pl1 vi_d3_pl1 sdmmc2&6vi_d4_pl2 vi_d4_pl2 vi&6vi_d5_pl3 vi_d5_pl3 sdmmc2&6vi_d6_pl4 vi_d6_pl4 vi&6vi_d7_pl5 vi_d7_pl5 sdmmc2&6vi_d8_pl6 vi_d8_pl6 sdmmc2&6vi_d9_pl7 vi_d9_pl7 sdmmc2&6lcd_d16_pm0 lcd_d16_pm0  displaya&6lcd_d17_pm1 lcd_d17_pm1  displaya&6lcd_d18_pm2 lcd_d18_pm2  displaya&6lcd_d19_pm3 lcd_d19_pm3  displaya&6lcd_d20_pm4 lcd_d20_pm4  displaya&6lcd_d21_pm5 lcd_d21_pm5  displaya&6lcd_d22_pm6 lcd_d22_pm6  displaya&6lcd_d23_pm7 lcd_d23_pm7  displaya&6dap1_fs_pn0 dap1_fs_pn0 i2s0&6dap1_din_pn1 dap1_din_pn1 i2s0&6dap1_dout_pn2dap1_dout_pn2 i2s0&6dap1_sclk_pn3dap1_sclk_pn3 i2s0&6lcd_cs0_n_pn4lcd_cs0_n_pn4  displaya&6lcd_sdout_pn5lcd_sdout_pn5  displaya&6lcd_dc0_pn6 lcd_dc0_pn6  displaya&6hdmi_int_pn7 hdmi_int_pn7 hdmi&6ulpi_data7_po0ulpi_data7_po0 uarta&6ulpi_data0_po1ulpi_data0_po1 uarta&6ulpi_data1_po2ulpi_data1_po2 uarta&6ulpi_data2_po3ulpi_data2_po3 uarta&6ulpi_data3_po4ulpi_data3_po4 uarta&6ulpi_data4_po5ulpi_data4_po5 uarta&6ulpi_data5_po6ulpi_data5_po6 uarta&6ulpi_data6_po7ulpi_data6_po7 uarta&6dap3_fs_pp0 dap3_fs_pp0 i2s2&6dap3_din_pp1 dap3_din_pp1 i2s2&6dap3_dout_pp2dap3_dout_pp2 i2s2&6dap3_sclk_pp3dap3_sclk_pp3 i2s2&6dap4_fs_pp4 dap4_fs_pp4 i2s3&6dap4_din_pp5 dap4_din_pp5 i2s3&6dap4_dout_pp6dap4_dout_pp6 i2s3&6dap4_sclk_pp7dap4_sclk_pp7 i2s3&6kb_col0_pq0 kb_col0_pq0 kbc&6kb_col1_pq1 kb_col1_pq1 kbc&6kb_col2_pq2 kb_col2_pq2 kbc&6kb_col3_pq3 kb_col3_pq3 kbc&6kb_col4_pq4 kb_col4_pq4 kbc&6kb_col5_pq5 kb_col5_pq5 kbc&6kb_col6_pq6 kb_col6_pq6 kbc&6kb_col7_pq7 kb_col7_pq7 kbc&6kb_row0_pr0 kb_row0_pr0 kbc&6kb_row1_pr1 kb_row1_pr1 kbc&6kb_row2_pr2 kb_row2_pr2 kbc&6kb_row3_pr3 kb_row3_pr3 kbc&6kb_row4_pr4 kb_row4_pr4 kbc&6kb_row5_pr5 kb_row5_pr5 kbc&6kb_row6_pr6 kb_row6_pr6 kbc&6kb_row7_pr7 kb_row7_pr7 kbc&6kb_row8_ps0 kb_row8_ps0 kbc&6kb_row9_ps1 kb_row9_ps1 kbc&6kb_row10_ps2 kb_row10_ps2 kbc&6kb_row11_ps3 kb_row11_ps3 kbc&6kb_row12_ps4 kb_row12_ps4 kbc&6kb_row13_ps5 kb_row13_ps5 kbc&6kb_row14_ps6 kb_row14_ps6 kbc&6kb_row15_ps7 kb_row15_ps7 kbc&6vi_pclk_pt0 vi_pclk_pt0 rsvd1&6vi_mclk_pt1 vi_mclk_pt1 vi&6vi_d10_pt2 vi_d10_pt2 ddr&6vi_d11_pt3 vi_d11_pt3 ddr&6vi_d0_pt4 vi_d0_pt4 ddr&6gen2_i2c_scl_pt5gen2_i2c_scl_pt5 i2c2&6Jgen2_i2c_sda_pt6gen2_i2c_sda_pt6 i2c2&6Jsdmmc4_cmd_pt7sdmmc4_cmd_pt7 sdmmc4&6pu0pu0 owr&6pu1pu1 rsvd1&6pu2pu2 rsvd1&6pu3pu3 pwm0&6pu4pu4 pwm1&6pu5pu5 pwm2&6pu6pu6 pwm3&6jtag_rtck_pu7jtag_rtck_pu7 rtck&6pv0pv0 rsvd1&6pv2pv2 owr&6pv3pv3  clk_12m_out&6ddc_scl_pv4 ddc_scl_pv4 i2c4&6ddc_sda_pv5 ddc_sda_pv5 i2c4&6crt_hsync_pv6crt_hsync_pv6 crt&6crt_vsync_pv7crt_vsync_pv7 crt&6lcd_cs1_n_pw0lcd_cs1_n_pw0  displaya&6lcd_m1_pw1 lcd_m1_pw1  displaya&6spi2_cs1_n_pw2spi2_cs1_n_pw2 spi2&6clk1_out_pw4 clk1_out_pw4  extperiph1&6clk2_out_pw5 clk2_out_pw5  extperiph2&6uart3_txd_pw6uart3_txd_pw6 uartc&6uart3_rxd_pw7uart3_rxd_pw7 uartc&6spi2_sck_px2 spi2_sck_px2 gmi&6spi1_mosi_px4spi1_mosi_px4 spi1&6spi1_sck_px5 spi1_sck_px5 spi1&6spi1_cs0_n_px6spi1_cs0_n_px6 spi1&6spi1_miso_px7spi1_miso_px7 spi1&6ulpi_clk_py0 ulpi_clk_py0 uartd&6ulpi_dir_py1 ulpi_dir_py1 uartd&6ulpi_nxt_py2 ulpi_nxt_py2 uartd&6ulpi_stp_py3 ulpi_stp_py3 uartd&6sdmmc1_dat3_py4sdmmc1_dat3_py4 sdmmc1&6sdmmc1_dat2_py5sdmmc1_dat2_py5 sdmmc1&6sdmmc1_dat1_py6sdmmc1_dat1_py6 sdmmc1&6sdmmc1_dat0_py7sdmmc1_dat0_py7 sdmmc1&6sdmmc1_clk_pz0sdmmc1_clk_pz0 sdmmc1&6sdmmc1_cmd_pz1sdmmc1_cmd_pz1 sdmmc1&6lcd_sdin_pz2 lcd_sdin_pz2  displaya&6lcd_wr_n_pz3 lcd_wr_n_pz3  displaya&6lcd_sck_pz4 lcd_sck_pz4  displaya&6sys_clk_req_pz5sys_clk_req_pz5 sysclk&6pwr_i2c_scl_pz6pwr_i2c_scl_pz6 i2cpwr&6Jpwr_i2c_sda_pz7pwr_i2c_sda_pz7 i2cpwr&6Jsdmmc4_dat0_paa0sdmmc4_dat0_paa0 sdmmc4&6sdmmc4_dat1_paa1sdmmc4_dat1_paa1 sdmmc4&6sdmmc4_dat2_paa2sdmmc4_dat2_paa2 sdmmc4&6sdmmc4_dat3_paa3sdmmc4_dat3_paa3 sdmmc4&6sdmmc4_dat4_paa4sdmmc4_dat4_paa4 sdmmc4&6sdmmc4_dat5_paa5sdmmc4_dat5_paa5 sdmmc4&6sdmmc4_dat6_paa6sdmmc4_dat6_paa6 sdmmc4&6sdmmc4_dat7_paa7sdmmc4_dat7_paa7 sdmmc4&6pbb0pbb0 i2s4&6cam_i2c_scl_pbb1cam_i2c_scl_pbb1 i2c3&6Jcam_i2c_sda_pbb2cam_i2c_sda_pbb2 i2c3&6Jpbb3pbb3 vgp3&6pbb4pbb4 vgp4&6pbb5pbb5 vgp5&6pbb6pbb6 vgp6&6pbb7pbb7 i2s4&6cam_mclk_pcc0cam_mclk_pcc0 vi_alt3&6pcc1pcc1 i2s4&6pcc2pcc2 i2s4&6sdmmc4_rst_n_pcc3sdmmc4_rst_n_pcc3 sdmmc4&6sdmmc4_clk_pcc4sdmmc4_clk_pcc4 sdmmc4&6clk2_req_pcc5clk2_req_pcc5 dap&6pex_l2_rst_n_pcc6pex_l2_rst_n_pcc6 pcie&6pex_l2_clkreq_n_pcc7pex_l2_clkreq_n_pcc7 pcie&6pex_l0_prsnt_n_pdd0pex_l0_prsnt_n_pdd0 pcie&6pex_l0_rst_n_pdd1pex_l0_rst_n_pdd1 pcie&6pex_l0_clkreq_n_pdd2pex_l0_clkreq_n_pdd2 pcie&6pex_wake_n_pdd3pex_wake_n_pdd3 pcie&6pex_l1_prsnt_n_pdd4pex_l1_prsnt_n_pdd4 pcie&6pex_l1_rst_n_pdd5pex_l1_rst_n_pdd5 pcie&6pex_l1_clkreq_n_pdd6pex_l1_clkreq_n_pdd6 pcie&6pex_l2_prsnt_n_pdd7pex_l2_prsnt_n_pdd7 pcie&6clk3_out_pee0clk3_out_pee0  extperiph3&6clk3_req_pee1clk3_req_pee1 dev3&6clk1_req_pee2clk1_req_pee2 dap&6hdmi_cec_pee3hdmi_cec_pee3 cec&6Jowrowr owr&6sdio3 drive_sdio3\s.*gpv drive_gpvserial@70006000(nvidia,tegra30-uartnvidia,tegra20-uartp`@ $serialrxtx#okayserial@70006040(nvidia,tegra30-uartnvidia,tegra20-uartp`@@ %serial  rxtx #disabledserial@70006200(nvidia,tegra30-uartnvidia,tegra20-uartpb .77serial  rxtx #disabledserial@70006300(nvidia,tegra30-uartnvidia,tegra20-uartpc ZAAserialrxtx #disabledserial@70006400(nvidia,tegra30-uartnvidia,tegra20-uartpd [BBserialrxtx #disabledgmi@70009000nvidia,tegra30-gmip+H*gmi*gmi #disabledpwm@7000a000&nvidia,tegra30-pwmnvidia,tegra20-pwmppwm #disabledrtc@7000e000&nvidia,tegra30-rtcnvidia,tegra20-rtcp i2c@7000c000&nvidia,tegra30-i2cnvidia,tegra20-i2cp &+ div-clkfast-clk i2crxtx#okay i2c@7000c400&nvidia,tegra30-i2cnvidia,tegra20-i2cp T+6div-clkfast-clk6i2crxtx#okay i2c@7000c500&nvidia,tegra30-i2cnvidia,tegra20-i2cp \+Cdiv-clkfast-clkCi2crxtx#okay i2c@7000c700&nvidia,tegra30-i2cnvidia,tegra20-i2cp x+ggi2cdiv-clkfast-clkrxtx#okay = i2c@7000d000&nvidia,tegra30-i2cnvidia,tegra20-i2cp 5+/div-clkfast-clk/i2crxtx#okay rt5640@1crealtek,rt5640   =&tps65911@2d ti,tps65911- V-/=Xdp |=$regulatorsvdd1vddio_ddr_1v2OOvdd2 vdd_1v5_gen``=vddctrlvdd_cpu,vdd_sys 5 #@]=vio vdd_1v8_genw@w@= ldo1vdd_pexa,vdd_pexb=ldo2vdd_sata,avdd_plleldo4vdd_rtcOOldo5vddio_sdmmc,avdd_vdacw@2Z=ldo6avdd_dsi_csi,pwrdet_mipiOOldo7vdd_pllm,x,u,a_p_c_sOOldo8 vdd_ddr_hsB@B@tps62361@60 ti,tps62361`tps62361-vout ` #@x=spi@7000d400*nvidia,tegra30-slinknvidia,tegra20-slinkp ;+))spirxtx #disabledspi@7000d600*nvidia,tegra30-slinknvidia,tegra20-slinkp R+,,spirxtx #disabledspi@7000d800*nvidia,tegra30-slinknvidia,tegra20-slinkp S+..spirxtx #disabledspi@7000da00*nvidia,tegra30-slinknvidia,tegra20-slinkp ]+DDspirxtx#okay}x@spi-flash@1winbond,w25q32jedec,spi-nor1-spi@7000dc00*nvidia,tegra30-slinknvidia,tegra20-slinkp ^+hhspirxtx #disabledspi@7000de00*nvidia,tegra30-slinknvidia,tegra20-slinkp O+ijspirxtx #disabledkbc@7000e200&nvidia,tegra30-kbcnvidia,tegra20-kbcp U$$kbc #disabledpmc@7000e400nvidia,tegra30-pmcp pclkclk32k_in}#okay %=Wp='memory-controller@7000f000nvidia,tegra30-mcp mc M=memory-controller@7000f400nvidia,tegra30-emcp N9=fuse@7000f800nvidia,tegra30-efusepfuse'fusetsensor@70014000nvidia,tegra30-tsensorp@ fddd )=!hda@70030000nvidia,tegra30-hdap Q}ohdahda2hdmihda2codec_2x}ohdahda2hdmihda2codec_2x #disabledahub@70080000nvidia,tegra30-ahubpp gjkd_audioapbifXjk eflmn <d_audioapbifi2s0i2s1i2s2i2s3i2s4dam0dam1dam2spdif@ rx0tx0rx1tx1rx2tx2rx3tx3+i2s@70080300nvidia,tegra30-i2sp?i2s #disabledi2s@70080400nvidia,tegra30-i2sp?  i2s#okay=%i2s@70080500nvidia,tegra30-i2sp?i2s #disabledi2s@70080600nvidia,tegra30-i2sp?eei2s #disabledi2s@70080700nvidia,tegra30-i2sp?ffi2s #disabledmmc@78000000nvidia,tegra30-sdhcix sdhcisdhci#okayS ` E i  r ~mmc@78000200nvidia,tegra30-sdhcix  sdhci sdhci #disabledmmc@78000400nvidia,tegra30-sdhcix EsdhciEsdhci #disabledmmc@78000600nvidia,tegra30-sdhcix sdhcisdhci#okay~usb@7d000000nvidia,tegra30-udc}@ utmiusb#okay peripheralusb-phy@7d000000nvidia,tegra30-usb-phy}@}@utmiregpll_uutmi-padsusbutmi-pads 33Eau #okay=usb@7d004000nvidia,tegra30-ehciusb-ehci}@@ utmi::usb#okayusb-phy@7d004000nvidia,tegra30-usb-phy}@@}@utmi:regpll_uutmi-pads:usbutmi-pads 33Eau #okay=usb@7d008000nvidia,tegra30-ehciusb-ehci}@ autmi;;usb#okayusb-phy@7d008000nvidia,tegra30-usb-phy}@}@utmi;regpll_uutmi-pads;usbutmi-pads33Eau #okay=cpus+cpu@0cpuarm,cortex-a9=cpu@1cpuarm,cortex-a9=cpu@2cpuarm,cortex-a9=cpu@3cpuarm,cortex-a9= pmuarm,cortex-a9-pmu0 thermal-zonestsensor0-thermal  ' 5!tripsdvfs-alert E8 Qpassive="cpu-div2-throttle EL Qhotsoc-critical E_ Q criticalcooling-mapsmap0 \"< a #tsensor1-thermal #disabled  ' 5!tripsdvfs-alert E8 Qpassivecpu_opp_table0operating-points-v2 p=opp@51000000,800 {Z1S 2 E 5 5opp@51000000,850 {Z S 2 E P Popp@51000000,912 {ZS 2 E opp@102000000,800 {Z1Se E 5 5opp@102000000,850 {Z Se E P Popp@102000000,912 {ZSe E opp@204000000,800 {Z1S (k E 5 5opp@204000000,850 {Z S (k E P Popp@204000000,912 {ZS (k E opp@312000000,850 {Z S E P Popp@312000000,912 {ZS E opp@340000000,800 {ZSC E 5 5opp@340000000,850 {ZSC E P Popp@370000000,800 {Z0lS  E 5 5opp@456000000,850 {Z S. E P Popp@456000000,912 {ZS. E opp@475000000,800 {Z1SO E 5 5opp@475000000,850 {(ZSO E P Popp@608000000,850 {ZS$=X E P Popp@608000000,912 {ZS$=X E opp@620000000,850 {Z0lS$s E P Popp@640000000,850 {xZS&% E P Popp@640000000,900 {ZS&% E opp@760000000,850 {PZ4aS-L E P Popp@760000000,900 {hZS-L E opp@760000000,912 {ZS-L E opp@760000000,975 {ZS-L Eopp@816000000,850 {ZS0, E P Popp@816000000,912 {ZS0, E opp@860000000,850 {Z S3B E P Popp@860000000,900 {xZS3B E opp@860000000,975 {8ZS3B Eopp@860000000,1000 {ZS3B EB@B@opp@910000000,900 {Z0`S6= E opp@1000000000,900 {Z S; E opp@1000000000,975 {xZS; Eopp@1000000000,1000 {ZS; EB@B@opp@1000000000,1025 {ZS; Eopp@1100000000,900 {ZSA E opp@1100000000,975 {HZSA Eopp@1100000000,1000 {8ZSA EB@B@opp@1100000000,1025 {ZSA Eopp@1100000000,1075 {ZSA Eg8g8opp@1150000000,975 {Z0`SD Eopp@1200000000,975 {ZSG Eopp@1200000000,1000 {HZSG EB@B@opp@1200000000,1025 {8ZSG Eopp@1200000000,1050 {ZSG Eopp@1200000000,1075 {ZSG Eg8g8opp@1200000000,1100 {ZSG Eopp@1300000000,1000 {ZSM|m EB@B@opp@1300000000,1025 { ZSM|m Eopp@1300000000,1050 {XZ0a @ SM|m Eopp@1300000000,1075 { ZSM|m Eg8g8opp@1300000000,1100 {ZSM|m Eopp@1300000000,1125 {ZSM|m E**opp@1300000000,1150 {ZSM|m E00opp@1300000000,1175 {ZSM|m Eopp@1400000000,1100 {Z0|SSrN Eopp@1400000000,1125 {Z SSrN E**opp@1400000000,1150 {Z SSrN E00opp@1400000000,1175 {ZSSrN Eopp@1400000000,1237 {ZSSrN Eopp@1500000000,1125 {(Z @ SYh/ E**opp@1500000000,1150 {(Z @ SYh/ E00opp@1500000000,1200 {ZSYh/ EOOopp@1500000000,1237 {ZSYh/ Eopp@1600000000,1212 {Z0`S_^ E~`~`opp@1600000000,1237 {Z0`S_^ Eopp@1700000000,1212 {Z0`SeS E~`~`opp@1700000000,1237 {Z0`SeS Ealiases /i2c@7000d000/tps65911@2d /rtc@7000e000 /serial@70006000chosen serial0:115200n8clock@0 fixed-clock }=gpio-leds gpio-ledsgpled1 LED1 ) Ygpled2 LED2 ) Xregulator@0regulator-fixed vdd_5v_inLK@LK@=regulator@1regulator-fixedchargepump_5vLK@LK@x  $regulator@2regulator-fixedvdd_ddr``x  $ regulator@3regulator-fixed vdd_5v_sataLK@LK@x    regulator@4regulator-fixed usb1_vbusLK@LK@     regulator@5regulator-fixed usb3_vbusLK@LK@     =regulator@6regulator-fixedsys_3v3,vdd_3v3_alw2Z2Zx  $ =regulator@7regulator-fixed sys_3v3_pexs2Z2Zx   _ =regulator@8regulator-fixed +VDD_5V_HDMILK@LK@x = sound;nvidia,tegra-audio-rt5640-beavernvidia,tegra-audio-rt5640 NVIDIA Tegra Beaver@ HeadphonesHPORHeadphonesHPOLMic JackMICBIAS1IN2PMic Jack % & ) 'pll_apll_a_out0mclkx'x compatibleinterrupt-parent#address-cells#size-cellsmodelphandleopp-microvoltopp-hzopp-supported-hwopp-suspendopp-peak-kBpsdevice_typeregreg-namesinterruptsinterrupt-names#interrupt-cellsinterrupt-map-maskinterrupt-mapbus-rangerangesclocksclock-namesresetsreset-namesstatusavdd-pexa-supplyavdd-pexb-supplyavdd-pex-pll-supplyavdd-plle-supplyvddio-pex-ctl-supplyhvdd-pex-supplyassigned-addressesnvidia,num-lanespooliommusnvidia,headinterconnectsinterconnect-nameshdmi-supplyvdd-supplynvidia,hpd-gpionvidia,ddc-i2c-businterrupt-controllerarm,data-latencyarm,tag-latencycache-unifiedcache-level#clock-cells#reset-cells#dma-cellsoperating-points-v2#cooling-cells#gpio-cellsgpio-controllerirampinctrl-namespinctrl-0nvidia,pinsnvidia,functionnvidia,pullnvidia,tristatenvidia,enable-inputnvidia,open-drainnvidia,high-speed-modenvidia,schmittnvidia,pull-down-strengthnvidia,pull-up-strengthnvidia,slew-rate-risingnvidia,slew-rate-fallingreg-shiftdmasdma-names#pwm-cellsclock-frequencyrealtek,ldo1-en-gpioswakeup-sourceti,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-coupled-withregulator-coupled-max-spreadregulator-max-step-microvoltnvidia,tegra-cpu-regulatorregulator-boot-onti,vsel0-state-highti,vsel1-state-highnvidia,tegra-core-regulatorspi-max-frequencynvidia,invert-interruptnvidia,suspend-modenvidia,cpu-pwr-good-timenvidia,cpu-pwr-off-timenvidia,core-pwr-good-timenvidia,core-pwr-off-timenvidia,core-power-req-active-highnvidia,sys-clock-req-active-high#iommu-cells#interconnect-cellsnvidia,memory-controllerassigned-clocksassigned-clock-parentsassigned-clock-rates#thermal-sensor-cellsnvidia,ahub-cif-idsvqmmc-supplycd-gpioswp-gpiospower-gpiosbus-widthnon-removablephy_typenvidia,needs-double-resetnvidia,phydr_mode#phy-cellsnvidia,hssync-start-delaynvidia,idle-wait-delaynvidia,elastic-limitnvidia,term-range-adjnvidia,xcvr-setupnvidia,xcvr-setup-use-fusesnvidia,xcvr-lsfslewnvidia,xcvr-lsrslewnvidia,xcvr-hsslewnvidia,hssquelch-levelnvidia,hsdiscon-levelnvidia,has-utmi-pad-registersvbus-supplycpu-supplyinterrupt-affinitypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceopp-sharedclock-latency-nsrtc0rtc1serial0stdout-pathlabelenable-active-highvin-supplygpio-open-drainnvidia,modelnvidia,audio-routingnvidia,i2s-controllernvidia,audio-codecnvidia,hp-det-gpios