Y8( l<STMicroelectronics STM32MP157C eval daughter on eval mother4!st,stm32mp157c-ev1st,stm32mp157c-ed1st,stm32mp157cpuscpu@0!arm,cortex-a7,&6HRdefaultsleeptimer@1!st,stm32h7-timer-triggerHokaycounter!st,stm32-timer-counter disabledtimer@40001000!st,stm32-timersH@ 'int``      ech1ch2ch3ch4uptrig disabledpwm !st,stm32-pwm3 disabledtimer@2!st,stm32h7-timer-triggerH disabledcounter!st,stm32-timer-counter disabledtimer@40002000!st,stm32-timersH@  'int@`    ech1ch2ch3ch4 disabledpwm !st,stm32-pwm3 disabledtimer@3!st,stm32h7-timer-triggerH disabledcounter!st,stm32-timer-counter disabledtimer@40003000!st,stm32-timersH@0 'int`` 7 8 9 : ; <ech1ch2ch3ch4uptrig disabledpwm !st,stm32-pwm3 disabledtimer@4!st,stm32h7-timer-triggerH disabledcounter!st,stm32-timer-counter disabledtimer@40004000!st,stm32-timersH@@ 'intokaytimer@5!st,stm32h7-timer-triggerHokaytimer@40005000!st,stm32-timersH@P 'int` Feup disabledtimer@6!st,stm32h7-timer-triggerH disabledtimer@40006000!st,stm32-timersH@` 'int disabledpwm !st,stm32-pwm3okay> H Rdefaultsleeptimer@11!st,stm32h7-timer-triggerH okaytimer@40007000!st,stm32-timersH@p 'int disabledpwm !st,stm32-pwm3 disabledtimer@12!st,stm32h7-timer-triggerH  disabledtimer@40008000!st,stm32-timersH@ 'int disabledpwm !st,stm32-pwm3 disabledtimer@13!st,stm32h7-timer-triggerH  disabledtimer@40009000!st,stm32-lptimerH@ o / 'mux disabledpwm!st,stm32-pwm-lp3 disabledtrigger@0!st,stm32-lptimer-triggerH disabledcounter!st,stm32-lptimer-counter disabledspi@4000b000!st,stm32h7-spiH@ T$ L  ` ' (erxtx disabledaudio-controller@4000b000!st,stm32h7-i2sH@ T$ ` ' (erxtx disabledspi@4000c000!st,stm32h7-spiH@ T3 L  ` = >erxtx disabledaudio-controller@4000c000!st,stm32h7-i2sH@ T3 ` = >erxtx disabledaudio-controller@4000d000!st,stm32h7-spdifrxH@ 'kclk Ta ` ] ^ erxrx-ctrl disabledserial@4000e000!st,stm32h7-uartH@ o   disabledserial@4000f000!st,stm32h7-uartH@ o   disabledRdefaultsleepidle> Hserial@40010000!st,stm32h7-uartH@ o  okayRdefaultsleepidle>Hserial@40011000!st,stm32h7-uartH@ o   disabledi2c@40012000!st,stm32mp15-i2cH@  eventerrorT  L  disabledi2c@40013000!st,stm32mp15-i2cH@0 eventerrorT!" L okayRdefaultsleep>H camera@3c !ovti,ov5640H< 'xclk" / ?KokayportendpointTdnyL3stmfx@42!st,stmfx-0300HBTrpinctrl!st,stmfx-0300-pinctrlLjoystick-pinsgpio0gpio1gpio2gpio3gpio4Lni2c@40014000!st,stm32mp15-i2cH@@ eventerrorTHI L  disabledi2c@40015000!st,stm32mp15-i2cH@P eventerrorTkl L okayRdefaultsleep>H cec@40016000 !st,stm32-cecH@` T^   'cechdmi-cecokayRdefault>dac@40017000!st,stm32h7-dac-coreH@p 'pclk disabledRdefault> !dac@1 !st,stm32-dacHokaydac@2 !st,stm32-dacHokayserial@40018000!st,stm32h7-uartH@ o   disabledserial@40019000!st,stm32h7-uartH@ o !  disabledtimer@44000000!st,stm32-timersHD 'intp`       ech1ch2ch3ch4uptrigcom disabledpwm !st,stm32-pwm3 disabledtimer@0!st,stm32h7-timer-triggerH disabledcounter!st,stm32-timer-counter disabledtimer@44001000!st,stm32-timersHD 'int disabledpwm !st,stm32-pwm3okay>"H#Rdefaultsleeptimer@7!st,stm32h7-timer-triggerHokaycounter!st,stm32-timer-counter disabledserial@44003000!st,stm32h7-uartHD0 o   disabledspi@44004000!st,stm32h7-spiHD@ T# LH ` % &erxtx disabledRdefault>$audio-controller@44004000!st,stm32h7-i2sHD@ T# ` % &erxtx disabledspi@44005000!st,stm32h7-spiHDP TT LI ` S Terxtx disabledtimer@44006000!st,stm32-timersHD` 'int@` i j k lech1uptrigcom disabledpwm !st,stm32-pwm3 disabledtimer@14!st,stm32h7-timer-triggerH disabledtimer@44007000!st,stm32-timersHDp 'int ` m nech1up disabledpwm !st,stm32-pwm3 disabledtimer@15!st,stm32h7-timer-triggerH disabledtimer@44008000!st,stm32-timersHD 'int ` o pech1up disabledpwm !st,stm32-pwm3 disabledtimer@16!st,stm32h7-timer-triggerH disabledspi@44009000!st,stm32h7-spiHD TU LJ ` U Verxtx disabledsai@4400a000!st,stm32h7-sai DHDD TWLP disabledaudio-controller@4400a004!st,stm32-sai-sub-aH  'sai_ck` W disabledaudio-controller@4400a024!st,stm32-sai-sub-bH$  'sai_ck` X disabledsai@4400b000!st,stm32h7-sai DHDD T[LQ disabledaudio-controller@4400b004!st,stm32-sai-sub-aH  'sai_ck` Y disabledaudio-controller@4400b024!st,stm32-sai-sub-bH$  'sai_ck` Z disabledsai@4400c000!st,stm32h7-sai DHDD TrLR disabledaudio-controller@4400c004!st,stm32-sai-sub-aH  'sai_ck` q disabledaudio-controller@4400c024!st,stm32-sai-sub-bH$  'sai_ck` r disableddfsdm@4400d000!st,stm32mp1-dfsdmHD 'dfsdm disabledfilter@0!st,stm32-dfsdm-adcH Tn` eerx disabledfilter@1!st,stm32-dfsdm-adcH To` ferx disabledfilter@2!st,stm32-dfsdm-adcH Tp` gerx disabledfilter@3!st,stm32-dfsdm-adcH Tq` herx disabledfilter@4!st,stm32-dfsdm-adcH Ts` [erx disabledfilter@5!st,stm32-dfsdm-adcH T~` \erx disableddma-controller@48000000 !st,stm32-dmaHH`T   / GLL%dma-controller@48001000 !st,stm32-dmaHH`T89:;<DEF HLL&dma-router@48002000!st,stm32h7-dmamuxHH @'%&3 ILL adc@48003000!st,stm32mp1-adc-coreHH0TZ J'busadc disabled>'Rdefault(@!!L)adc@0!st,stm32mp1-adcHr)T` erxokay L\adc@100!st,stm32mp1-adcHr)T` erx disabledmmc@48004000!arm,pl18xarm,primecellu%1HH@ Tcmd_irq x 'apb_pclkL' disabledRdefaultopendrainsleep>*H+,dusb-otg@49000000!st,stm32mp15-hsotgsnps,dwc2HI 'otgLdwc2 Tb   otg#-okay1.>/Rdefault=0 Busb2-phymailbox@4c001000!st,stm32mp1-ipccLHLX,ode = rxtxwakeup SokayLmdcmi@4c006000!st,stm32-dcmiHL` TNM M'mclk` KetxokayRdefaultsleep>1H2portendpointT3cdyLrcc@50000000!st,stm32mp1-rccsysconHPlLpwr@50001000!st,stm32mp1,pwr-regHP(y4reg11reg11LRreg18reg18w@w@LSusb33usb332Z2ZL-pwr_mcu@50001014!st,stm32mp151-pwr-mcusysconHPLeinterrupt-controller@5000d000!st,stm32mp1-extisysconHPL syscon@50020000!st,stm32mp157-syscfgsysconHP 3Ltimer@50021000!st,stm32-lptimerHP o 0 'mux disabledpwm!st,stm32-pwm-lp3 disabledtrigger@1!st,stm32-lptimer-triggerH disabledcounter!st,stm32-lptimer-counter disabledtimer@50022000!st,stm32-lptimerHP  o 2 'mux disabledpwm!st,stm32-pwm-lp3 disabledtrigger@2!st,stm32-lptimer-triggerH disabledtimer@50023000!st,stm32-lptimerHP0 o 4 'mux disabledpwm!st,stm32-pwm-lp3 disabledtimer@50024000!st,stm32-lptimerHP@ o 5 'mux disabledpwm!st,stm32-pwm-lp3 disabledvrefbuf@50025000!st,stm32-vrefbufHPP`&% 4 disabledsai@50027000!st,stm32h7-sai PpHPpPs TL disabledaudio-controller@50027004!st,stm32-sai-sub-aH  'sai_ck` c disabledaudio-controller@50027024!st,stm32-sai-sub-bH$  'sai_ck` d disabledthermal@50028000!st,stm32-thermalHP T 5'pclkokayLhash@54002000!st,stm32f756-hashHT  TP a `5 einokayrng@54003000 !st,stm32-rngHT0 | okaydma-controller@58000000!st,stm32h7-mdmaHX Tz d 3 0L5memory-controller@58002000!st,stm32mp1-fmc2-ebiHX  y okayP`dhlRdefaultsleep>6H7nand-controller@4,0!st,stm32mp1-fmc2-nfcHH   T0H`5 5 5  etxrxeccokaynand@0Hspi@58003000!st,stm32f469-qspiHX0p qspiqspi_mm T\0`55etxrx z okayRdefaultsleep >89: H;<=mx66l51235l@0!jedec,spi-norH omx66l51235l@1!jedec,spi-norH ommc@58005000!arm,pl18xarm,primecellu%1HXP T1cmd_irq v 'apb_pclk 'okayRdefaultopendrainsleep>>?H@?AB /C8CNdDZEgtmmc@58007000!arm,pl18xarm,primecellu%1HXp T|cmd_irq w 'apb_pclk 'okayRdefaultopendrainsleep>FGHHGIJdZ(crc@58009000!st,stm32f7-crcHX nokayethernet@5800a000#!st,stm32mp1-dwmacsnps,dwmac-4.20aHX  stmmacetho=macirq6'stmmacethmac-clk-txmac-clk-rxeth-ckptp_refethstp0 igh{pKokay>LHMRdefaultsleep rgmii-id%/Nstmmac-axi-config:JZLKmdio0!snps,dwmac-mdioethernet-phy@0HLNusb@5800c000 !generic-ohciHX o  TJ disabledLOusb@5800d000 !generic-ehciHX o  TKdOokay=Pdisplay-controller@5a001000!st,stm32-ltdcHZTXY 'lcd okayportendpoint@0HTQL`watchdog@5a002000!st,stm32mp1-iwdgHZ  : 'pclklsiokayn usbphyc@5a006000!st,stm32mp1-usbphycHZ`  zRSokayusb-phy@0H4LPusb-phy@1H4L0serial@5c000000!st,stm32h7-uartH\ o   disabledspi@5c001000!st,stm32h7-spiH\ TV  @0`5"5#erxtx disabledi2c@5c002000!st,stm32mp15-i2cH\  eventerrorT_`  B okayRdefaultsleep>THU ,stpmic@33 !st,stpmic1H3 oVokayregulators!st,stpmic1-regulatorsWWWWXW*W:WGYVYbuck1vddcoreOpeybuck2vdd_ddrppeyLXbuck3vdd2Z2ZeyL(buck4v3v32Z2ZeyLldo1vdda,@ ,@ TL!ldo2v2v8**TLldo3vtt_ddr  qeldo4vdd_usbTL4ldo5vdd_sd,@ ,@ TLDldo6v1v8w@w@Tvref_ddr vref_ddreboostbst_outTLYpwr_sw1 vbus_otgT L.pwr_sw2vbus_swT onkey!st,stpmic1-onkeyTonkey-fallingonkey-rising okaywatchdog!st,stpmic1-wdt disabledrtc@5c004000!st,stm32mp1-rtcH\@ A 'pclkrtc_ck Tokayefuse@5c005000!st,stm32mp15-bsecH\Pcalib@5cH\calib@5eH^i2c@5c009000!st,stm32mp15-i2cH\ eventerrorT  C   disabledtamp@5c00a000 !st,stm32-tampsysconsimple-mfdH\Lfpin-controller@50002000!st,stm32mp157-pinctrl P r   `LZgpio@50002000H TGPIOAokay*ZLVgpio@50003000H UGPIOBokay*Zgpio@50004000H  VGPIOCokay*Z gpio@50005000H0 WGPIODokay*Z0Logpio@50006000H@ XGPIOEokay*Z@gpio@50007000HP YGPIOFokay*ZPLbgpio@50008000H` ZGPIOGokay*Z`LCgpio@50009000Hp [GPIOHokay*Zpgpio@5000a000H \GPIOIokay*ZLgpio@5000b000H ]GPIOJokay*Zgpio@5000c000H ^GPIOKokay*Zadc1-in6-0L'pins1\adc12-ain-0pins1#\]^adc12-ain-1pins1\]adc12-usb-cc-pins-0pins1cec-0Lpins18EVcec-sleep-0pins1cec-1pins18EVcec-sleep-1pins1dac-ch1-0Lpins1dac-ch2-0L pins1dcmi-0L1pins<1xyz{|~Fw8dcmi-sleep-0L2pins<1xyz{|~Fwdcmi-1pins,1&z{AK3M8dcmi-sleep-1pins,1&z{AK3Mrgmii-0LLpins1 1e d m n " B  ! 8`Vpins21 8`Vpins31$ %     8rgmii-sleep-0LMpins1<1edmn"B!$%rgmii-1pins1 1e d m n " B  ! 8`Vpins21 8`Vpins31$ % v w   8rgmii-sleep-1pins1<1edmn"B!$%vwrgmii-2pins1 1e d  n " B k ! 8`Vpins21 8`Vpins31$ % v    8rgmii-sleep-2pins1<1edn"Bk!$%vrmii-0pins11m n   ! 8`Vpins2 1$ %  8rmii-sleep-0pins1$1mn!$%fmc-0L6pins1414 5 ; < > ? 0 1 G H I J i 8`Vpins216 pfmc-sleep-0L7pins8145;<>?01GHIJ6ifmc-1pinsT14 5  > ? 0 1 G H I J K L M N O 8 9 : i l 8`Vfmc-sleep-1pinsT145>?01GHIJKLMNO89:ili2c1-0pins1<_8EVi2c1-sleep-0pins1<_i2c1-1pins1^_8EVi2c1-sleep-1pins1^_i2c2-0Lpins1tu8EVi2c2-sleep-0Lpins1tui2c2-1pins1u8EVi2c2-sleep-1pins1ui2c2-2pins1Qu8EVi2c2-sleep-2pins1Qui2c5-0Lpins1  8EVi2c5-sleep-0Lpins1  i2c5-1pins1018EVi2c5-sleep-1pins101i2s2-0pins 1 V`8i2s2-sleep-0pins 1 ltdc-0pinsp1gZrsxyz |OEF}~9lj:88`Vltdc-sleep-0pinsp1gZrsxyz |OEF}~9lj:8ltdc-1pinsp18`Vltdc-sleep-1pinsp1ltdc-2pins1T1  36:KLMOt xyz}8`Vpins21N8`Vltdc-sleep-2pins1X1 36:KLMOtxyz}Nltdc-3pins11g8`Vpins2l1Mmsxy{|OE}Kt h9lj:L8`Vltdc-sleep-3pinsp1gMmsxy{|OE}Kth9lj:Lm-can1-0L\pins11} V`8pins21 8m_can1-sleep-0L]pins1}m-can1-1pins11 V`8pins21 8m_can1-sleep-1pins1  m-can2-0pins11 V`8pins21 8m_can2-sleep-0pins1pwm1-0pins 1IKN`Vpwm1-sleep-0pins 1IKNpwm2-0Lpins1`Vpwm2-sleep-0Lpins1pwm3-0pins1'`Vpwm3-sleep-0pins1'pwm3-1pins18`Vpwm3-sleep-1pins1pwm4-0pins1>?`Vpwm4-sleep-0pins1>?pwm4-1pins1=`Vpwm4-sleep-1pins1=pwm5-0pins1{`Vpwm5-sleep-0pins1{pwm5-1pins 1{|8`Vpwm5-sleep-1pins 1{|pwm8-0L"pins1`Vpwm8-sleep-0L#pins1pwm12-0L pins1v`Vpwm12-sleep-0L pins1vqspi-clk-0L8pins1Z 8`Vqspi-clk-sleep-0L;pins1Zqspi-bk1-0L9pins11X Y W V 8`Vpins21 p`Vqspi-bk1-sleep-0L<pins1XYWVqspi-bk2-0L:pins11r s j g 8`Vpins21 p`Vqspi-bk2-sleep-0L=pins1rsjg sai2a-0pins1 @ V`8sai2a-sleep-0pins1@sai2a-1pins1 1 = V`8sai2a-sleep-1pins 1=sai2a-2pins 1=;<V`8sai2b-0pins1 1L M N V`8pins21[ 8sai2b-sleep-0pins1[LMNsai2b-1pins1[ 8sai2b-sleep-1pins1[sai2b-2pins11[ 8sai2b-sleep-2pins1[sai4a-0pins1 V`8sai4a-sleep-0pins1sdmmc1-b4-0L>pins11( ) * + 2 V`8pins21, V`8sdmmc1-b4-od-0L@pins11( ) * + V`8pins21, V`8pins312 VE8sdmmc1-b4-init-0pins11( ) * + V`8sdmmc1-b4-sleep-0LApins1()*+,2sdmmc1-dir-0L?pins1 1R '  V`ppins21D psdmmc1-dir-init-0pins1 1R '  V`psdmmc1-dir-sleep-0LBpins1R'Dsdmmc1-dir-1pins1 1R N  V`ppins21D psdmmc1-dir-sleep-1pins1RNDsdmmc2-b4-0LFpins11    f V`ppins21C V`psdmmc2-b4-od-0LHpins11    V`ppins21C V`ppins31f VEpsdmmc2-b4-sleep-0LIpins1Cfsdmmc2-b4-1pins11    f V`8pins21C V`8sdmmc2-b4-od-1pins11    V`8pins21C V`8pins31f VE8sdmmc2-d47-0LGpins1 E 3 V`psdmmc2-d47-sleep-0LJpins1 E3sdmmc2-d47-1pins1 & ' V`8sdmmc2-d47-sleep-1pins1 &'sdmmc2-d47-2pins1  & ' V`psdmmc2-d47-sleep-2pins1&'sdmmc2-d47-3pins1 E ' sdmmc2-d47-sleep-3pins1 E'sdmmc3-b4-0L*pins11P T U 7 Q V`ppins21o V`psdmmc3-b4-od-0L+pins11P T U 7 V`ppins21o V`ppins31Q VEpsdmmc3-b4-sleep-0L,pins1PTU7oQsdmmc3-b4-1pins11P T 5 7 0 V`ppins21o V`psdmmc3-b4-od-1pins11P T 5 7 V`ppins21o V`ppins310 VEpsdmmc3-b4-sleep-1pins1PT57o0spdifrx-0pins1l 8spdifrx-sleep-0pins1lspi2-0pins118`Vpins218spi4-0pins1LF8`Vpins21M8stusb1600-0pins1puart4-0Lpins11k8`Vpins21 8uart4-idle-0Lpins11kpins21 8uart4-sleep-0Lpins1kuart4-1pins111 8`Vpins21 8uart4-2pins11k8`Vpins21 8uart7-0pins11H8`Vpins2 1GJI8uart7-1pins11W8`Vpins21V8uart7-2pins11H8`Vpins21G8uart7-idle-2pins11Hpins21G8uart7-sleep-2pins1HGuart8-0pins11A 8`Vpins21@ 8uart8rtscts-0pins1g j 8usart2-0pins11U48`Vpins21638usart2-sleep-0pins1U463usart2-1pins11U8`Vpins21TO8usart2-sleep-1pins1UTOusart2-2pins11548`Vpins21638usart2-idle-2pins1153pins2148`Vpins3168usart2-sleep-2pins15463usart3-0pins118`Vpins21 8usart3-1L pins11h 8`Vpins21 8usart3-idle-1Lpins11pins21h 8`Vpins31 8usart3-sleep-1Lpins1husart3-2pins11h 8`Vpins21 8usart3-idle-2pins11pins21h 8`Vpins31 8usart3-sleep-2pins1husbotg-hs-0L/pins1 usbotg-fs-dp-dm-0pins1  pin-controller-z@54004000!st,stm32mp157-z-pinctrl T@r   `L[gpio@54004000H _GPIOZ} okay*[i2c2-0pins18EVi2c2-sleep-0pins1i2c4-0LTpins18EVi2c4-sleep-0LUpins1i2c6-0pins18EVi2c6-sleep-0pins1spi1-0L$pins118`Vpins218can@4400e000 !bosch,m_canHDDm_canmessage_ramT int0int1  'hclkcclk  okayRdefaultsleep>\H]can@4400f000 !bosch,m_canHDD(m_canmessage_ramT int0int1  'hclkcclk   disabledgpu@59000000 !vivante,gcHY Tm e~ 'buscore ^dsi@5a000000 !st,stm32-dsiHZ _'pclkrefpx_clk apbokaySportsport@0HendpointT`LQport@1HendpointTaLdpanel-dsi@0!raydium,rm68200H ?bcokayportendpointTdLacryp@54001000!st,stm32mp1-crypHT TO ` okayahb!st,mlahbsimple-bus$800m4@10000000!st,stm32mp1-m4H08 !    e fD fHokay 0ghijkl >mmmm Evq0vq1shutdowndetachr TDchosen Pserial0:115200n8memory@c0000000nRdefaultbutton-0 JoySel rTbutton-1 JoyDown lrTbutton-2 JoyLeft irTbutton-3 JoyRight jrTbutton-4 JoyUp grTpanel-backlight!gpio-backlight 9o  okayLc #address-cells#size-cellsmodelcompatibleclock-frequencydevice_typeregphandleinterruptsinterrupt-affinityinterrupt-parentmethod#interrupt-cellsinterrupt-controller#clock-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisst,syscfgstatusrangesclocksclock-names#pwm-cellspinctrl-0pinctrl-1pinctrl-namesdmasdma-namesinterrupts-extendedwakeup-sourceresets#sound-dai-cellspinctrl-2uart-has-rtsctsinterrupt-namesst,syscfg-fmpi2c-analog-filteri2c-scl-rising-time-nsi2c-scl-falling-time-nsDOVDD-supplypowerdown-gpiosreset-gpiosrotationremote-endpointbus-widthdata-shifthsync-activevsync-activepclk-samplevdd-supplygpio-controller#gpio-cellsgpio-rangespinsbias-pull-downvref-supply#io-channel-cells#dma-cellsst,mem2memdma-requestsdma-mastersdma-channelsvdda-supplyst,adc-channelsst,min-sample-time-nsecsarm,primecell-periphidcap-sd-highspeedcap-mmc-highspeedmax-frequencybroken-cdst,neg-edgevmmc-supplyreset-namesg-rx-fifo-sizeg-np-tx-fifo-sizeg-tx-fifo-sizedr_modeusb33d-supplyvbus-supplyphysphy-names#mbox-cellsst,proc-idbus-type#reset-cellsvdd_3v3_usbfs-supplyregulator-nameregulator-min-microvoltregulator-max-microvolt#thermal-sensor-cellsdma-maxburstnand-on-flash-bbtreg-namesspi-rx-bus-widthspi-max-frequencycd-gpiosdisable-wpst,sig-dirst,use-ckinvqmmc-supplysd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-ddr50non-removableno-sdno-sdiommc-ddr-3_3vst,sysconsnps,mixed-burstsnps,pblsnps,en-tx-lpi-clockgatingsnps,axi-configsnps,tsophy-modemax-speedphy-handlesnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blencompaniontimeout-secvdda1v1-supplyvdda1v8-supply#phy-cellsphy-supplybuck1-supplybuck2-supplybuck3-supplybuck4-supplyldo1-supplyldo2-supplyldo3-supplyldo4-supplyldo5-supplyldo6-supplyvref_ddr-supplyboost-supplypwr_sw1-supplypwr_sw2-supplyregulator-always-onregulator-initial-moderegulator-over-current-protectionst,mask-resetregulator-boot-onregulator-active-dischargepower-off-time-secpins-are-numberedst,packagest,bank-namengpiospinmuxbias-disabledrive-open-drainslew-ratedrive-push-pullbias-pull-upst,bank-ioportbosch,mram-cfgcontiguous-areaphy-dsi-supplybacklightpower-supplydma-rangesst,syscfg-holdbootst,syscfg-tzst,syscfg-pddsst,syscfg-rsc-tblst,syscfg-m4-statememory-regionmboxesmbox-namesstdout-pathno-mapserial0serial1ethernet0regulator-typegpios-stateslabellinux,codedefault-on