f@8a(ah ,Mele A1000G Quad top set box%2mele,a1000g-quadallwinner,sun6i-a31aliases=/soc/ethernet@1c30000G/soc/serial@1c28000chosen OVserial0:115200n8framebuffer-lcd0-hdmi02allwinner,simple-framebuffersimple-framebufferbde_be0-lcd0-hdmi@u3/2wz |disabledframebuffer-lcd002allwinner,simple-framebuffersimple-framebuffer bde_be0-lcd00u3/wz |disabledtimer2arm,armv7-timer0   n6cpusallwinner,sun6i-a31 cpu@02arm,cortex-a7cpuu aO /O SB@cpu@12arm,cortex-a7cpuu aO /O SB@cpu@22arm,cortex-a7cpuu aO /O SB@cpu@32arm,cortex-a7cpuu aO /O SB@ thermal-zonescpu_thermal!7Ecooling-mapsmap0U0Z tripscpu_alert0ipupassivecpu_critiu criticalpmu2arm,cortex-a7-pmu0xyz{clocks Oclk-24M 2fixed-clockn6osc24Mclk-32k 2fixed-clockosc32kclk-mii-phy-tx 2fixed-clock}x@ mii_phy_tx clk-gmac-int-tx 2fixed-clocksY@ gmac_int_tx clk@1c200d02allwinner,sun7i-a20-gmac-clku gmac_tx$display-engine#2allwinner,sun6i-a31-display-engine  |disabledsoc 2simple-bus Odma-controller@1c020002allwinner,sun6i-a31-dma  2ulcd-controller@1c0c0002allwinner,sun6i-a31-tcon Vlcdu/ahbtcon-ch0tcon-ch1tcon0-pixel-clockports port@0 endpoint@06endpoint@10port@1 endpoint@1lcd-controller@1c0d0002allwinner,sun6i-a31-tcon Wlcdu0ahbtcon-ch0tcon-ch1tcon1-pixel-clockports port@0 endpoint@07endpoint@11port@1 endpoint@1mmc@1c0f0002allwinner,sun7i-a20-mmc uOQPahbmmcoutputsampleahb <default|okay )3mmc@1c100002allwinner,sun7i-a20-mmc uRTSahbmmcoutputsampleahb =default |disabled mmc@1c110002allwinner,sun7i-a20-mmc uUWVahbmmcoutputsampleahb > |disabled mmc@1c120002allwinner,sun7i-a20-mmc  uXZYahbmmcoutputsample ahb ? |disabled hdmi@1c160002allwinner,sun6i-a31-hdmi` X(u2 ahbmodddcpll-0pll-1ahbc+ apbspdifFpinctrl@1f02c002allwinner,sun6i-a31-r-pinctrl,-.u;apbhosclosc= s-ir-rx-pinPL4s_ir>s-p2wi-pinsPL0PL1s_p2wi?i2c@1f034002allwinner,sun6i-a31-p2wi4 'u;=default?|okay pmic@682x-powers,axp221h@ac-power-supply 2x-powers,axp221-ac-power-supply |disabledadc2x-powers,axp221-adcbattery-power-supply%2x-powers,axp221-battery-power-supply |disabledregulators dcdc1vcc-3v322ZJ2Zdcdc2vdd-gpu2 `J$@dcdc3vdd-cpu2 `J$@dcdc4 vdd-sys-dll2 `J$@dcdc5 vcc-dram2`J`dc1swdc1swdc5ldo vdd-cpus2 `J$@aldo1 vcc-wifi22ZJ2Zaldo2aldo2aldo3avcc2)2J2Zdldo1vcc-ethernet-phy22ZJ2Z'dldo2dldo2dldo3dldo3dldo4 vcc-usb-hub22ZJ2Zeldo1eldo1eldo2eldo2eldo3eldo3ldo_io0ldo_io0 |disabledldo_io1ldo_io1 |disabledrtc_ldo2-J-rtc_ldodrivevbus drivevbus |disabledusb_power_supply!2x-powers,axp221-usb-power-supply |disabledahci-5v2regulator-fixedahci-5v2LK@JLK@bt |disabledusb0-vbus2regulator-fixed usb0-vbus2LK@JLK@t  |disabledusb1-vbus2regulator-fixed usb1-vbus2LK@JLK@bt|okayusb2-vbus2regulator-fixed usb2-vbus2LK@JLK@bt |disabledvcc3v02regulator-fixedvcc3v02-J-vcc3v32regulator-fixedvcc3v322ZJ2Zvcc5v02regulator-fixedvcc5v02LK@JLK@leds 2gpio-ledsbluea1000g:blue:pwr6 on interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0serial0rangesstdout-pathallwinner,pipelineclocksstatusinterruptsclock-frequencyarm,cpu-registers-not-fw-configuredenable-methoddevice_typeregclock-latencyoperating-points#cooling-cellscpu-supplyphandlepolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresis#clock-cellsclock-output-namesallwinner,pipelinesresets#dma-cellsreset-namesclock-namesremote-endpointallwinner,tcon-channelpinctrl-namespinctrl-0vmmc-supplybus-widthcd-gpiosdma-namesdmasinterrupt-namesphysphy-namesextcondr_modereg-names#phy-cellsusb1_vbus-supplyusb2_vbus-supply#reset-cellsgpio-controllerinterrupt-controller#interrupt-cells#gpio-cellspinsfunctiondrive-strengthbias-pull-up#sound-dai-cells#thermal-sensor-cellsreg-shiftreg-io-widthsnps,pblsnps,fixed-burstsnps,force_sf_dma_modephyphy-modephy-supplyassigned-clocksassigned-clock-ratesclock-divclock-mult#io-channel-cellsx-powers,dcdc-freqregulator-nameregulator-always-onregulator-min-microvoltregulator-max-microvoltregulator-boot-onenable-active-highgpiolabeldefault-state